New Delhi, Nov 6 (PTI) An Indian defence engineering company has joined hands with a US-based firm to accelerate the development of advanced semiconductor packaging capabilities in India, according to an official statement.
The collaboration will combine Paras Semiconductors' manufacturing ambitions in opto-electronics, photonics and co-packaged optics with BroadPak's technology expertise in advanced semiconductor packaging, heterogeneous integration and chiplet-based system architectures, it said.
Paras Defence and Space Technologies Ltd is an Indian defence engineering company that delivers a comprehensive suite of indigenously designed, developed, and manufactured (IDDM) products and solutions for the defence and space sectors.
BroadPak Corporation, headquartered in San Jose, California, is a "leading provider of 2.5D/3D integration technologies, comprehensive design and development services, and innovative total solutions," reads the statement dated November 6.
It turns complex chiplet, memory, and photonics architectures into manufacturable systems from co-design and simulation through assembly and production.
"Paras Semiconductors, a subsidiary of Paras Defence & Space Technologies Limited, announced a strategic technology partnership with BroadPak Corporation, USA, to accelerate the development of advanced semiconductor packaging capabilities in India," the statement said.
Through this partnership, Paras Semiconductors aims to establish an advanced heterogeneous integration and 3D packaging OSAT (Outsourced Semiconductor Assembly and Test) facility in India, it added.
"The proposed facility will focus on developing capabilities across 2.5D/3D packaging, chiplet integration, hybrid bonding, wafer-level and panel-level fan-out packaging, co-packaged optics and advanced semiconductor testing and qualification," the statement said.
Founded in 2007, BroadPak Corporation has worked across 2.5D/3D IC packaging, heterogeneous integration, multi-die architectures, high-speed interconnects, thermal management and co-packaged optics.
Its capabilities span the packaging development cycle, from architecture and design to simulation, assembly, testing and production.
"Under the collaboration, Paras Semiconductors will gain access to BroadPak's advanced design, manufacturing and integration intellectual property, alongside technology transfer and process know-how in 2.5D/3D packaging and chiplet integration.
"The partnership will also explore the joint development of advanced packaging platforms for AI and high-performance computing applications, as well as collaborative training and skill development for Indian engineers," the statement read.
The proposed facility will address the need for high-volume manufacturing and strategic electronics, particularly semiconductor devices for optical and optronic systems, alongside high-performance computing (HPC), networking and data centre applications.
Commenting on the partnership, Munjal Sharad Shah, the managing director of Paras Defence & Space Technologies Limited, said, "Our entry into the semiconductor sector represents a strategic expansion into a technology domain that is increasingly critical to India's AI and data centres and industrial capabilities."
He added, "Our collaboration with BroadPak brings the specialised technology expertise required to accelerate this ambition and develop capabilities that can serve both strategic domestic requirements and the wider semiconductor industry."
Farhang Yazdani, Founder and Chief Executive Officer, BroadPak Corporation, said, "Through our collaboration with Paras Semiconductors, we look forward to bringing our expertise in advanced packaging technologies, engineering and manufacturing processes to support the development of these capabilities in India."
The partnership comes at a time when advanced packaging is assuming greater importance in the global semiconductor value chain.
As demand for AI accelerators, GPUs, high-bandwidth memory and data-intensive computing increases, the industry is increasingly relying on chiplets, 2.5D/3D integration and hybrid bonding to improve computing performance, bandwidth, power efficiency and thermal management, the statement said.
